The approaches described in this section are approaches that could be pursued, but not necessarily approaches that have been previously conceived or pursued. Therefore, unless otherwise indicated, the approaches described in this section may not be prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
In semiconductor integrated circuit manufacturing, it is conventional to test integrated circuits (“IC's”) during manufacturing and prior to shipment to ensure proper operation. Wafer testing is a well-known testing technique commonly used in production testing of wafer-mounted semiconductor IC's, wherein a temporary electrical connection is established between automatic test equipment (ATE) and each IC formed on the wafer to demonstrate proper performance of the IC's. Components that may be used in wafer testing include an ATE test board, which is a multilayer printed circuit board that is connected to the ATE, and that transfers the test signals between the ATE and a probe card assembly. Conventional probe card assemblies include a printed circuit board, a probe head assembly having a plurality of flexible test probes attached thereto, and an interposer that electrically connects the test probes to the printed circuit board. The test probes are conventionally mounted to electrically conductive, typically metallic, bonding pads on a substrate using solder attach, wire bonding or wedge bonding techniques.
In operation, a device under test is moved into position so that the test probes make contact with corresponding contact points on the device under test. When contact is made, the test probes flex, which causes the tips of the test probes to move laterally on and “scrub” the contact points on the device under test. This scrubbing action is desirable because it removes any oxides or other material that may be present on the contact points, providing better electrical contact.
One of the challenges with probe card assemblies is how to reduce the amount of “overdrive” that is required to ensure that all test probes contact a device under test. In the context of probe test cards, the term “overdrive” generally refers to the distance traveled after the first test probe has made contact with a device under test. In most probe card assemblies, since the tips of the test probes are not co-planar, once the first test probe has made contact with the device under test, additional travel is required to ensure that all test probes make contact with the device under test. In applications with poor planarity, the amount of required overdrive can be substantial. For example, in situations where the tip-to-tip planarity is in the range of about 30 to 50 microns, approximately 100 microns of overdrive may be required to ensure that all test probes contact the device under test. Large amounts of overdrive are undesirable because it can shorten the life of test probes, typically measured in the number of “touchdowns”, damage test probes, and/or cause shorts between test probes. In view of the foregoing, a probe head assembly that does not suffer from limitations of prior probe head assemblies is highly desirable.